Signal Integrity (SI)
To ensure the accuracy of designs on the first attempt, high-frequency and fast-switching interconnects necessitate comprehensive analysis of signal (SI) and power integrity (PI). Caliber possesses extensive expertise in SI theory and simulation tools to examine a range of issues, including impedance mismatch-related reflections, crosstalk, signal attenuation, and PDN noise. The analysis is performed at the IC package/substrate and board levels in both pre- and post-layout stages.
Post Layout Analysis
The routed board is simulated to identify any potential issues such as reflection, overshoot/undershoot, crosstalk, attenuation, EMI, and PDN. Based on the simulation results, a post layout report is created which includes recommendations for topology modification, termination schemes, and layout adjustments to achieve optimal signal and power integrity.
High Speed Channel Modeling
We specialize in modeling a wide range of products including IC packages, HDI PCBs, Back-planes, Add-in cards, Via breakouts, connectors, socket/pogo pins, probes, and cables. Our team utilizes advanced 3D tools from Ansys & Sigrity to create highly accurate models.
We offer end-to-end/system-level channel modeling and optimization to enhance the overall performance. Our expertise also includes SERDES design & simulations, where we are skilled in tuning and utilizing the FFE, CTLE, and DFE parameters in IBIS-AMI model-based simulations.
In terms of speed, we have achieved a maximum of 112Gbps (PAM4) in production level and 116Gbps (PAM4) in prototype.
PCB/Package - Signal Integrity Analysis
We offer a range of signal integrity modelling and analysis services for electronic components and systems, including:
IC packages, HDI PCBs, backplanes, add-in cards, via breakouts, and related components
Analysis of single-ended and differential crosstalk
Investigation of signal attenuation caused by IR-drop, skin-effect, and dielectric loss
Channel analysis for serial communication, including eye diagram analysis
System level simulations based on IBIS/IBIS-AMI models
Clock analysis, both for common and source synchronous designs
Timing analysis for DDR memory interfaces
S-parameter analysis, covering return/insertion loss, NEXT and FEXT, and mixed mode channels (both common and differential)
Analysis of coupling effects, for both single-ended and differential signals
Co-design services, addressing IC/package/board interactions and optimization.
Power Integrity Analysis (PI)
We are performing all of the following tasks as part of our Power Integrity Analysis (PI):
Analyzing and mitigating simultaneous switching noise (SSN)
Minimizing voltage drop or IR-drop
Analyzing the impedance profile of the power distribution network
Estimating transient noise
Extracting parasitic RLGC values
Optimizing the estimation and placement of de-coupling capacitors
By conducting a thorough PI analysis, we can identify potential issues and optimize the design of the power delivery network, ultimately leading to improved system performance, reliability, and reduced time-to-market.
EMI/EMC Analysis
Net - wise radiated EMI
EMC analysis based on FCC, CISPR and VCCI requirement
Interfacing Technologies
We have extensive simulation capabilities and experience in various technologies such as GDDR, DDR 3 & 4, LPDDR4/x, UFS & eMMC, PCIe Gen 3, 4 and 5, MIPI, CSI, HDMI, USB 3.1 & 3.2, SATA, C-phy, SERDES, GbE, SGMII, QSFP/SFP optical modules, Firefly connectors, 112 Gbps channel simulation, and up to 100GHz RF channels. With our expertise in these areas, we are able to provide top-notch simulation services to our clients.
Analysis Tools Expertise
Cadence Sigrity
Keysight ADS
Siemens Hyperlynx
Ansys Siwave
Ansys HFSS
HSPICE
Advanced Tools
SYS942 - Clarity IC package extraction suite
SIGR302 - Sigrity power SI II
SYS103 - Celcius power DC
